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at91rm9200移植u-boot

慎峻
2023-12-01
我是一个基督徒,今年36岁了,目前在一家上市公司担任维修组的负责人,2018.7月份开始了业余编程,到现在已经2年的时间了,因着上帝的恩典和怜悯,从零开始,现在把linux系统跑起来了。圣经上面说:“你们白白的得来,也要白白的舍去”。我要和大家一起分享我这两个年来做出来的东西,希望能够帮助有需要的人。
荣耀归于神,平安归于他所喜悦的人。

硬件介绍:
CPU: at91rm9200
SDRAM: IS42S16160C-7TLI 	32M
NAND FALSH: H27U1G8F2BTR(或nand512w3a2snb)
NORFLASH): S29AL016J70TFI020 	SST39VF6401-70-4C-B1K
NET: CS8900A-IQ3Z
扩展网卡: CS8900A-IQ3Z 或 DM9000

编译环境介绍:
linux系统: Ubuntu 18.04.3 LTS (GNU/Linux 5.3.0-53-generic x86_64)
编译器: arm-linux-gcc-4.1.1-920t.tar.bz2

j-link工程文件: arm9v2.jflash
非常非常重要,用j-link下载程序全靠它!

  1. 在本机下载u-boot1.3.4,然后利用ftp工具把u-boot1.3.4上传到服务器上/RM9200/soft下:
    ftp://ftp.denx.de/pub/u-boot/

  2. 解压:$tar xjf u-boot-1.3.4.tar.bz2 -C …/

  3. 配置u-boot:
    在Makefile line2352找到:
    at91rm9200dk_config : unconfig
    @$(MKCONFIG) $(@:_config=) arm arm920t at91rm9200dk atmel at91rm9200

    $make at91rm9200dk_config
    Configuring for at91rm9200dk board…

    $make
    … …
    arm-linux-objcopy --gap-fill=0xff -O srec u-boot u-boot.srec
    arm-linux-objcopy --gap-fill=0xff -O binary u-boot u-boot.bin

    测试:把u-boot.bin文件下载到开发板中,重新上电串口无反应

  4. 改变为norflash启动:
    修改/u-boot-1.3.4/cpu/arm920t/start.s:
    line181: #ifdef CONFIG_AT91RM9200 /* change1: ifnodef->if defined /
    line266: /
    #else / / change2: 注释掉 #else*/

    保存文件后重新编译: @make

    测试:把u-boot.bin文件下载到开发板中,重新上电串口输出:
    U-Boot 1.3.4 (Jul 24 2020 - 09:58:49)
    DRAM: 32 MB
    Atmel: Flash: 0 kB
    NAND: 0 MB
    *** Warning - bad CRC, using default environment
    In: serial
    Out: serial
    Err: serial
    U-Boot>

  5. 配置norflash: S29AL016J70TFI020(CFI标准的flash) manufacturer id:0x1 device id: 0x2249
    入口函数在/u-boot-1.3.4/lib_arm/board.c:
    line333: ifndef CFG_NO_FLASH
    /* configure available FLASH banks /
    size = flash_init ();
    display_flash_config (size);
    #endif /
    CFG_NO_FLASH */

    /u-boot-1.3.4/board/atmel/at91rm9200dk/Makefile:
    注释: line28: COBJS := at91rm9200dk.o led.o mux.o partition.o # 去掉flash.o

    /u-boot-1.3.4/include/configs/at91rm9200dk.h:
    添加在#define PHYS_FLASH_1 0x10000000 上一行:
    /* NOR FLASH START*/
    #define CFG_FLASH_CFI 1
    #define CFG_FLASH_CFI_DRIVER 1
    #define CFG_FLASH_USE_BUFFER_WRITE 1
    #define CFG_FLASH_INCREMENT 0
    #define CFG_FLASH_PROTECTION 1
    #define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE }
    #define CFG_FLASH_CFI_WIDTH FLASH_CFI_16BIT

     	/* S29AL016J70TFI020 */
    

    保存后重新编译: $make

    测试:把u-boot.bin文件下载到开发板中,重新上电串口输出:
    U-Boot 1.3.4 (Jul 24 2020 - 13:24:13)
    DRAM: 32 MB
    Flash: 2 MB
    NAND: 0 MB
    *** Warning - bad CRC, using default environment
    In: serial
    Out: serial
    Err: serial
    U-Boot>
    “Flash: 2 MB”, 找到了第一个flash
    在"U-Boot>"后输入flinfo 打印如下信息
    Bank # 1: CFI conformant FLASH (16 x 16) Size: 2 MB in 35 Sectors
    AMD Standard command set, Manufacturer ID: 0x01, Device ID: 0x2249
    Erase timeout: 8192 ms, write timeout: 1 ms
    Sector Start Addresses:
    10000000 10004000 10006000 10008000 10010000
    10020000 10030000 10040000 10050000 10060000 RO
    10070000 10080000 10090000 100A0000 100B0000
    100C0000 100D0000 100E0000 100F0000 10100000
    10110000 10120000 10130000 10140000 10150000
    10160000 10170000 10180000 10190000 101A0000
    101B0000 101C0000 101D0000 101E0000 101F0000

  6. 配置norflash: SST39VF6401(jedec标准的flash) JEDEC PROBE: manufacturer id:0xbf device id: 0x236d
    /u-boot-1.3.4/include/configs/at91rm9200dk.h:
    修改:#define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE }
    为:#define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE, CFG_FLASH2_BASE }
    修改:#define CFG_MAX_FLASH_BANKS 1
    为:#define CFG_MAX_FLASH_BANKS 2

     添加在#define CFG_FLASH_WRITE_TOUT		(2*CFG_HZ) /* Timeout for Flash Write */下一行:
     	/* SST39VF6401 */
     	#define CONFIG_FLASH_CFI_LEGACY	1
     	#define CFG_FLASH_LEGACY_8Mx8	1
     	#define PHYS_FLASH_2			0x30000000
     	#define PHYS_FLASH2_SIZE			0x4000000  /* 64 megs bit main flash */
     	#define CFG_FLASH2_BASE			PHYS_FLASH_2
     	/* NOR FLASH END*/
    

    /u-boot-1.3.4/drivers/mtd/cfi_flash.c:
    修改: line66: #define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE }
    为:#define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE, CFG_FLASH2_BASE }

    /u-boot-1.3.4/board/atmel/at91rm9200dk/at91rm9200dk.c:
    添加在最后一行:
    #if defined(CONFIG_FLASH_CFI_LEGACY)
    /*
    * Hardcoded flash setup:
    * Flash 0 is a non-CFI AMD AM29F040 flash, 8 bit flash / 8 bit bus.
    /
    ulong board_flash_get_legacy (ulong base, int banknum, flash_info_t * info)
    {
    if (banknum == 1) { /
    non-CFI boot flash */
    AT91C_BASE_SMC2->SMC2_CSR[2] = 0x1100318A;
    info->portwidth = FLASH_CFI_16BIT;
    info->chipwidth = FLASH_CFI_BY16;
    info->interface = FLASH_CFI_X16;
    return 1;
    } else
    return 0;
    }
    #endif

    /u-boot-1.3.4/drivers/mtd/jedec_flash.c:
    添加line68:
    #define SST39VF6401 0x236d

     添加line189: 
     	#ifdef CFG_FLASH_LEGACY_8Mx8
     		{
     			.mfr_id		= MANUFACTURER_SST,
     			.dev_id		= SST39VF6401,
     			.name		= "SST SST39VF6401",
     			.uaddr		= {
     				[1] = MTD_UADDR_0x5555_0x2AAA /* x16 */
     			},
     			.DevSize	= SIZE_8MiB,
     			.CmdSet		= P_ID_AMD_STD,
     			.NumEraseRegions= 1,
     			.regions	= {
     				ERASEINFO(0x10000,128),
     			}
     		},
     	#endif
    

    保存文件后重新编译: @make

    测试:把u-boot.bin文件下载到开发板中,重新上电串口输出:
    U-Boot 1.3.4 (Jul 24 2020 - 16:04:57)
    DRAM: 32 MB
    Flash: 10 MB
    NAND: 0 MB
    *** Warning - bad CRC, using default environment
    In: serial
    Out: serial
    Err: serial
    U-Boot>
    “Flash: 10 MB”, 找到了第二个flash
    在"U-Boot>"后输入flinfo 打印如下信息

    Bank # 2: SST SST39VF6401 FLASH (16 x 16) Size: 8 MB in 128 Sectors
    AMD Legacy command set, Manufacturer ID: 0xBF, Device ID: 0x236D
    Erase timeout: 30000 ms, write timeout: 100 ms

     	  Sector Start Addresses:
     	  30000000        30010000        30020000        30030000        30040000
     	  30050000        30060000        30070000        30080000        30090000
     	  300A0000        300B0000        300C0000        300D0000        300E0000
     	  300F0000        30100000        30110000        30120000        30130000
     	  30140000        30150000        30160000        30170000        30180000
     	  30190000        301A0000        301B0000        301C0000        301D0000
     	  301E0000        301F0000        30200000        30210000        30220000
     	  30230000        30240000        30250000        30260000        30270000
     	  30280000        30290000        302A0000        302B0000        302C0000
     	  302D0000        302E0000        302F0000        30300000        30310000
     	  30320000        30330000        30340000        30350000        30360000
     	  30370000        30380000        30390000        303A0000        303B0000
     	  303C0000        303D0000        303E0000        303F0000        30400000
     	  30410000        30420000        30430000        30440000        30450000
     	  30460000        30470000        30480000        30490000        304A0000
     	  304B0000        304C0000        304D0000        304E0000        304F0000
     	  30500000        30510000        30520000        30530000        30540000
     	  30550000        30560000        30570000        30580000        30590000
     	  305A0000        305B0000        305C0000        305D0000        305E0000
     	  305F0000        30600000        30610000        30620000        30630000
     	  30640000        30650000        30660000        30670000        30680000
     	  30690000        306A0000        306B0000        306C0000        306D0000
     	  306E0000        306F0000        30700000        30710000        30720000
     	  30730000        30740000        30750000        30760000        30770000
     	  30780000        30790000        307A0000        307B0000        307C0000
     	  307D0000        307E0000        307F0000
    
  7. 配置NAND FALSH:
    /* pin function discription kaiyuanPCB my PCB
    7 R/B ready/busy PC14 PC5
    8 RE read enable PC1 PC1
    9 CE chip enable PC13(out) PC4
    16 CLE command lanch table adress7 AD21
    17 ALE address lanch table adress6 AD22
    18 WE write enable PC3 PC3(WE)
    19 WP write protect vcc vcc
    Io0-Io7 data input/output
    */

    入口函数在/u-boot-1.3.4/lib_arm/board.c:
    #if defined(CONFIG_CMD_NAND)
    puts ("NAND: ");
    nand_init(); /* go init the NAND */
    #endif

    方案1(不支持支持MTD分区功能):
    /u-boot-1.3.4/include/configs/at91rm9200dk.h:(根据硬件修改结果是)
    修改:
    #define AT91_SMART_MEDIA_ALE (1 << 22) /* our ALE is AD22 /
    #define AT91_SMART_MEDIA_CLE (1 << 21) /
    our CLE is AD21 */
    #define NAND_DISABLE_CE(nand) do { *AT91C_PIOC_SODR = AT91C_PIO_PC4;} while(0)
    #define NAND_ENABLE_CE(nand) do { *AT91C_PIOC_CODR = AT91C_PIO_PC4;} while(0)
    #define NAND_WAIT_READY(nand) while (!(*AT91C_PIOC_PDSR & AT91C_PIO_PC5))

     	添加:
     		在#define CONFIG_CMD_NAND下添加:
     			#define CFG_NAND_LEGACY
     	
     /u-boot-1.3.4/board/atmel/at91rm9200dk/at91rm9200dk.c: 
     	修改: 
     		void nand_init (void)
     		{
     			/* Setup Smart Media, fitst enable the address range of CS3 */
     			*AT91C_EBI_CSA |= AT91C_EBI_CS3A_SMC_SmartMedia;
     			/* set the bus interface characteristics based on
     			   tDS Data Set up Time 30 - ns
     			   tDH Data Hold Time 20 - ns
     			   tALS ALE Set up Time 20 - ns
     			   16ns at 60 MHz ~= 3  */
     		/*memory mapping structures */
     		#define SM_ID_RWH	(5 << 28)
     		#define SM_RWH		(1 << 28)
     		#define SM_RWS		(0 << 24)
     		#define SM_TDF		(1 << 8)
     		#define SM_NWS		(3)
     			AT91C_BASE_SMC2->SMC2_CSR[3] = (SM_RWH | SM_RWS |
     				AT91C_SMC2_ACSS_STANDARD | AT91C_SMC2_DBW_8 |
     				SM_TDF | AT91C_SMC2_WSEN | SM_NWS);
    
     			/* enable the SMOE line PC0=SMCE, A21=CLE, A22=ALE */
     			*AT91C_PIOC_ASR = /* AT91C_PC0_BFCK |*/ AT91C_PC1_BFRDY_SMOE |
     				AT91C_PC3_BFBAA_SMWE;
     			*AT91C_PIOC_PDR = /* AT91C_PC0_BFCK |*/ AT91C_PC1_BFRDY_SMOE |
     				AT91C_PC3_BFBAA_SMWE;
    
     			/* ouput mode */
     			*AT91C_PIOC_PER = AT91C_PIO_PC4;
     			*AT91C_PIOC_OER = AT91C_PIO_PC4;
     			/* input mode */
     			*AT91C_PIOC_PER = AT91C_PIO_PC5;
     			*AT91C_PIOC_ODR = AT91C_PIO_PC5;
    
     			/* PIOB and PIOC clock enabling */
     			//*AT91C_PMC_PCER = 1 << AT91C_ID_PIOB;
     			*AT91C_PMC_PCER = 1 << AT91C_ID_PIOC;
    
     		#ifdef DEBUG
     			printf ("  SmartMedia card inserted\n");
    
     			printf ("Probing at 0x%.8x\n", AT91_SMARTMEDIA_BASE);
     		#endif
     			printf ("%4lu MB\n", nand_probe(AT91_SMARTMEDIA_BASE) >> 20);
     		}
     	
     /u-boot-1.3.4/include/asm-arm/arch-at91rm9200/at91rm9200.h: 
     	添加: 
     		#define AT91C_PIOC_OER		((AT91_REG *)	0xFFFFF810) /* (PIOC) Output Disable Registerr */
     		#define AT91C_PIO_PC4		((unsigned int) 1 << 4)
     		#define AT91C_PIO_PC5		((unsigned int) 1 << 5)
     	
     /u-boot-1.3.4/include/linux/mtd/nand_ids.h:
     	添加line27:  
     		{"NAND512 NAND512W3A2S",  NAND_MFR_NAND512W, 0x76, 26, 0, 3, 0x4000, 0},
     		{"HYNIX H27U1G8F2B",      NAND_MFR_HYNIX, 	0xf1, 28, 0, 3, 0x20000, 0},
     
     /u-boot-1.3.4/include/linux/mtd/nand_legacy.h: 
     	添加line137: 
     		#define NAND_MFR_NAND512W	0x20
     		#define NAND_MFR_HYNIX		0xad
     
     保存文件后重新编译: @make
     
     测试:把u-boot.bin文件下载到开发板中,重新上电串口输出:
     	U-Boot 1.3.4 (Jul 24 2020 - 19:29:33)
     	DRAM:  32 MB
     	Flash: 10 MB
     	NAND:    64 MB
     	*** Warning - bad CRC, using default environment
     	In:    serial
     	Out:   serial
     	Err:   serial
     	U-Boot>
     	"NAND:    64 MB", 找到了nand flash;
     	在"U-Boot>"后输入nand info, 打印如下信息: 
     		Device 0: NAND512 NAND512W3A2S at 0x40000000 (64 MB, 16 kB sector)
    

    方案2(支持MTD分区功能):
    /u-boot-1.3.4/include/configs/at91rm9200dk.h:(根据硬件修改结果是)
    修改:
    #define AT91_SMART_MEDIA_ALE (1 << 22) /* our ALE is AD22 /
    #define AT91_SMART_MEDIA_CLE (1 << 21) /
    our CLE is AD21 */
    #define NAND_DISABLE_CE(nand) do { *AT91C_PIOC_SODR = AT91C_PIO_PC4;} while(0)
    #define NAND_ENABLE_CE(nand) do { *AT91C_PIOC_CODR = AT91C_PIO_PC4;} while(0)
    #define NAND_WAIT_READY(nand) while (!(*AT91C_PIOC_PDSR & AT91C_PIO_PC5))

     	注释:
     		//#define CFG_NAND_LEGACY
     		//#define NAND_CTL_CLRALE(nandptr)
     		//#define NAND_CTL_SETALE(nandptr)
     		//#define NAND_CTL_CLRCLE(nandptr)
     		//#define NAND_CTL_SETCLE(nandptr)
     	
     	添加在//#define CFG_NAND_LEGACY下面: 
     		#define CFG_NAND_BASE 0x40000000 
     		
     /u-boot-1.3.4/include/asm-arm/arch-at91sam9/gpio.h
     	注释: // #include <asm/arch/at91_pio.h>
     	
     	添加: 
     		#include <asm-arm/arch-at91sam9/at91_pio.h>
     		#include <asm-arm/arch-at91sam9/at91sam9rl.h>
     	
     /u-boot-1.3.4/board/atmel/at91rm9200dk/at91rm9200dk.c: 
     	注释: 
     		#if 0
     		extern ulong nand_probe (ulong physadr);
    
     		#define AT91_SMARTMEDIA_BASE 0x40000000	/* physical address to access memory on NCS3 */
     		void nand_init (void)
     		{
     			/* Setup Smart Media, fitst enable the address range of CS3 */
     			*AT91C_EBI_CSA |= AT91C_EBI_CS3A_SMC_SmartMedia;
     			/* set the bus interface characteristics based on
     			   tDS Data Set up Time 30 - ns
     			   tDH Data Hold Time 20 - ns
     			   tALS ALE Set up Time 20 - ns
     			   16ns at 60 MHz ~= 3  */
     		/*memory mapping structures */
     		#define SM_ID_RWH	(5 << 28)
     		#define SM_RWH		(1 << 28)
     		#define SM_RWS		(0 << 24)
     		#define SM_TDF		(1 << 8)
     		#define SM_NWS		(3)
     			AT91C_BASE_SMC2->SMC2_CSR[3] = (SM_RWH | SM_RWS |
     				AT91C_SMC2_ACSS_STANDARD | AT91C_SMC2_DBW_8 |
     				SM_TDF | AT91C_SMC2_WSEN | SM_NWS);
    
     			/* enable the SMOE line PC0=SMCE, A21=CLE, A22=ALE */
     			*AT91C_PIOC_ASR = /* AT91C_PC0_BFCK |*/ AT91C_PC1_BFRDY_SMOE |
     				AT91C_PC3_BFBAA_SMWE;
     			*AT91C_PIOC_PDR = /* AT91C_PC0_BFCK |*/ AT91C_PC1_BFRDY_SMOE |
     				AT91C_PC3_BFBAA_SMWE;
    
     			/* ouput mode */
     			*AT91C_PIOC_PER = AT91C_PIO_PC4;
     			*AT91C_PIOC_OER = AT91C_PIO_PC4;
     			/* input mode */
     			*AT91C_PIOC_PER = AT91C_PIO_PC5;
     			*AT91C_PIOC_ODR = AT91C_PIO_PC5;
    
     			/* PIOB and PIOC clock enabling */
     			//*AT91C_PMC_PCER = 1 << AT91C_ID_PIOB;
     			*AT91C_PMC_PCER = 1 << AT91C_ID_PIOC;
    
     		#ifdef DEBUG
     			printf ("  SmartMedia card inserted\n");
    
     			printf ("Probing at 0x%.8x\n", AT91_SMARTMEDIA_BASE);
     		#endif
     			printf ("%4lu MB\n", nand_probe(AT91_SMARTMEDIA_BASE) >> 20);
     		}
     		#endif
     	
     	注释: 
     		// #include <at91rm9200_net.h>
     		// #include <dm9161.h>
     	
     	添加: 
     		#include <asm-arm/arch-at91sam9/gpio.h>
     		#include <nand.h>
    
     		#define	MASK_ALE	(1 << 22)	/* our ALE is AD21 */
     		#define	MASK_CLE	(1 << 21)	/* our CLE is AD22 */
     	
     	修改(line57):	((AT91PS_PIO) AT91C_BASE_PIOA)->PIO_OER = AT91C_PA23_TXD2;
     			为: *AT91C_PIOA_OER = AT91C_PA23_TXD2;
     	
     	添加在#if 0上面: 
     		/*
     		 *	hardware specific access to control-lines */
     		static void at91rm9200dk_nand_hwcontrol(struct mtd_info *mtd, int cmd)
     		{
     			struct nand_chip *this = mtd->priv;
     			ulong IO_ADDR_W = (ulong) this->IO_ADDR_W;
    
     			IO_ADDR_W &= ~(MASK_ALE|MASK_CLE);
     			switch (cmd) {
     			case NAND_CTL_SETCLE:
     				IO_ADDR_W |= MASK_CLE;
     				break;
     			case NAND_CTL_SETALE:
     				IO_ADDR_W |= MASK_ALE;
     				break;
     			case NAND_CTL_CLRNCE:
     				at91_set_gpio_value(AT91_PIN_PC4, 1);
     				break;
     			case NAND_CTL_SETNCE:
     				at91_set_gpio_value(AT91_PIN_PC4, 0);
     				break;
     			}
     			this->IO_ADDR_W = (void *) IO_ADDR_W;
     		}
    
     		static int at91rm9200dk_nand_ready(struct mtd_info *mtd)
     		{
     			return at91_get_gpio_value(AT91_PIN_PC5);
     		}
    
     		/*
     		 * Disk On Chip (NAND) Millenium initialization.
     		 * The NAND lives in the CS2* space
     		 */
    
     		int board_nand_init(struct nand_chip *nand)
     		{
     			nand->eccmode = NAND_ECC_SOFT;
     		#ifdef CFG_NAND_DBW_16
     			nand->options = NAND_BUSWIDTH_16;
     		#endif	
    
     			/* Setup Smart Media, fitst enable the address range of CS3 */
     			*AT91C_EBI_CSA |= AT91C_EBI_CS3A_SMC_SmartMedia;
     			/* set the bus interface characteristics based on
     			   tDS Data Set up Time 30 - ns
     			   tDH Data Hold Time 20 - ns
     			   tALS ALE Set up Time 20 - ns
     			   16ns at 60 MHz ~= 3  */
     		/*memory mapping structures 0x1100418a*/
     		#define SM_ID_RWH	(5 << 28)
     		#define SM_RWH		(1 << 28)
     		#define SM_RWS		(0 << 24)
     		#define SM_TDF		(1 << 8)
     		#define SM_NWS		(3)
     			AT91C_BASE_SMC2->SMC2_CSR[3] = (SM_RWH | SM_RWS |
     				AT91C_SMC2_ACSS_STANDARD | AT91C_SMC2_DBW_8 |
     				SM_TDF | AT91C_SMC2_WSEN | SM_NWS);
    
     			/* enable the SMOE line PC0=SMCE, A21=CLE, A22=ALE */
     			*AT91C_PIOC_ASR = /* AT91C_PC0_BFCK |*/ AT91C_PC1_BFRDY_SMOE |
     				AT91C_PC3_BFBAA_SMWE;
     			*AT91C_PIOC_PDR = /* AT91C_PC0_BFCK |*/ AT91C_PC1_BFRDY_SMOE |
     				AT91C_PC3_BFBAA_SMWE;
    
     			/* ouput mode */
     			*AT91C_PIOC_PER = AT91C_PIO_PC4;
     			*AT91C_PIOC_OER = AT91C_PIO_PC4;
     			/* input mode */
     			*AT91C_PIOC_PER = AT91C_PIO_PC5;
     			*AT91C_PIOC_ODR = AT91C_PIO_PC5;
    
     			/* PIOB and PIOC clock enabling */
     			//*AT91C_PMC_PCER = 1 << AT91C_ID_PIOB;
     			*AT91C_PMC_PCER = 1 << AT91C_ID_PIOC;
    
     			nand->hwcontrol = at91rm9200dk_nand_hwcontrol;
     			nand->dev_ready = at91rm9200dk_nand_ready;
     			nand->chip_delay = 20;
    
     			return 0;
     		}
     	
     /u-boot-1.3.4/include/asm-arm/arch-at91rm9200/at91rm9200.h: 
     	添加: 
     		#define AT91C_PIOC_OER		((AT91_REG *)	0xFFFFF810) /* (PIOC) Output Disable Registerr */
     		#define AT91C_PIO_PC4		((unsigned int) 1 << 4)
     		#define AT91C_PIO_PC5		((unsigned int) 1 << 5)
     	
     /u-boot-1.3.4/include/linux/mtd/nand_ids.h:
     	添加line27:  
     		{"NAND512 NAND512W3A2S",  NAND_MFR_NAND512W, 0x76, 26, 0, 3, 0x4000, 0},
     		{"HYNIX H27U1G8F2B",      NAND_MFR_HYNIX, 	0xf1, 28, 0, 3, 0x20000, 0},
     
     /u-boot-1.3.4/include/linux/mtd/nand_legacy.h: 
     	添加line137: 
     		#define NAND_MFR_NAND512W	0x20
     		#define NAND_MFR_HYNIX		0xad
     
     u-boot-1.3.4/lib_arm/board.c:
     	添加line(486): 
     		/* mtdparts variable not set, see 'help mtdparts' */
     		run_command("mtdparts default",0); 	
     
     保存文件后重新编译: @make
     
     测试:把u-boot.bin文件下载到开发板中,重新上电串口输出:
     	U-Boot 1.3.4 (Jul 24 2020 - 19:29:33)
     	DRAM:  32 MB
     	Flash: 10 MB
     	NAND:    64 MB
     	*** Warning - bad CRC, using default environment
     	In:    serial
     	Out:   serial
     	Err:   serial
     	U-Boot>
     	"NAND:    64 MB", 找到了nand flash;
     	在"U-Boot>"后输入nand info, 打印如下信息: 
     		Device 0: NAND512 NAND512W3A2S at 0x40000000 (64 MB, 16 kB sector)
    
  8. 配置CS8900
    入口函数在/u-boot-1.3.4/lib_arm/board.c:
    line452: #ifdef CONFIG_DRIVER_CS8900
    cs8900_get_enetaddr (gd->bd->bi_enetaddr);
    #endif

    /u-boot-1.3.4/include/configs/at91rm9200dk.h:
    在#undef CFG_ENV_IS_IN_DATAFLASH上面添加:
    /* Ethernet start /
    /
    Ethernet: cs8900 /
    #define CONFIG_DRIVER_CS8900 1
    #define CS8900_BASE 0x80000300 /
    local CS8900 /
    // #define CS8900_BASE 0x40000300 /
    extend CS8900 /
    #define CS8900_BUS16 1 /
    the Linux driver does accesses as shorts /
    /
    Ethernet end */

     在#define CFG_GBL_DATA_SIZE	128	/* size in bytes reserved for initial data */下添加: 
     /* DEFAULT ENVIRONMENT */
     #define CONFIG_DEFAULT_ENVIRONMENT
     #define CONFIG_ETHADDR 9e:7f:24:47:25:a1
     #define CONFIG_IPADDR  10.124.0.33
     #define CONFIG_SERVERIP 10.124.0.45
     
     注释: 
     #if 0
     #define CONFIG_DRIVER_ETHER
     #define CONFIG_NET_RETRY_COUNT		20
     #define CONFIG_AT91C_USE_RMII
     #endif
    

    /u-boot-1.3.4/drivers/net/cs8900.c:
    添加line113:
    void wait(volatile unsigned int dly)
    {
    for(; dly > 0; dly–);
    }

     添加line125: 
     	//Net1(local) init  (another config CS8900_BASE: 0x80000300)
     	//Reset Net1  **is very important
     	AT91C_BASE_PIOB->PIO_OER = 1<<27;
     	AT91C_BASE_PIOB->PIO_CODR = 1<<27;		//low
    
     	//Configure PC13 controllers to periph A mode
     	AT91C_BASE_PIOC->PIO_ASR = 1<<13;
     	AT91C_BASE_PIOC->PIO_BSR = 0x00000000;
     	AT91C_BASE_PIOC->PIO_PDR = 1<<13;
    
     	//Configure CS7
     	AT91C_BASE_SMC2->SMC2_CSR[7] = 0x1100318A;
     	//
    
     	/*Net2(extend) init	 (another config CS8900_BASE: 0x40000300)
     	//Reset Net2  **is very important
     	AT91C_BASE_PIOC->PIO_OER = 1<<14;	
     	AT91C_BASE_PIOC->PIO_CODR = 1<<14;		//low
    
     	//Configure CS3
     	AT91C_BASE_SMC2->SMC2_CSR[3] = 0x1100318A;
     	*/
     	
     	wait(50000);
    
     修改line156: 
     	/* verify chip id */
     	if (get_reg_init_bus (PP_ChipID) != 0x630e) {
     		printf ("CS8900 Ethernet chip not found?!\n");
     		return 0;
     	}
     	else
     	{
     		printf ("CS8900 found?!");
     		printf ("chip id is %x\n", get_reg_init_bus (PP_ChipID));
     	}	
    

    /u-boot-1.3.4/net/eth.c
    注释line621: //at91rm9200_miiphy_initialize(bis);

    保存文件后重新编译: @make

    测试:把u-boot.bin文件下载到开发板中,重新上电串口输出:
    U-Boot 1.3.4 (Jul 25 2020 - 11:49:20)
    DRAM: 32 MB
    Flash: 2 MB
    NAND: 64 MB
    In: serial
    Out: serial
    Err: serial
    CS8900 found?!chip id is 630e
    U-Boot>
    “CS8900 found?!chip id is 630e”,找到cs8900网卡

     串口中断输入: 
     U-Boot>setenv serverip 10.124.1.17(自己电脑的IP)
     U-Boot>saveenv
     打开tftpd32后,设置传输文件的路径
     U-Boot>tftp 20000000 u-boot.bin
     	TFTP from server 10.124.1.174; our IP address is 10.124.0.33
     	Filename 'u-boot.bin'.
     	Load address: 0x20000000
     	Loading: #########
     	done
     	Bytes transferred = 124632 (1e6d8 hex)
     证明文件传输成功! 网卡测试OK!
    
  9. 配置扩展cs8900
    入口函数在/u-boot-1.3.4/lib_arm/board.c:
    line452: #ifdef CONFIG_DRIVER_CS8900
    cs8900_get_enetaddr (gd->bd->bi_enetaddr);
    #endif

    /u-boot-1.3.4/include/configs/at91rm9200dk.h:
    注释: //#define CS8900_BASE 0x80000300 /* local CS8900 /
    打开: #define CS8900_BASE 0x40000300 /
    extend CS8900 */

    /u-boot-1.3.4/drivers/net/cs8900.c:
    注释:
    /*Net1(local) init (another config CS8900_BASE: 0x80000300)
    //Reset Net1 **is very important
    AT91C_BASE_PIOB->PIO_OER = 1<<27;
    AT91C_BASE_PIOB->PIO_CODR = 1<<27; //low

     	//Configure PC13 controllers to periph A mode
     	AT91C_BASE_PIOC->PIO_ASR = 1<<13;
     	AT91C_BASE_PIOC->PIO_BSR = 0x00000000;
     	AT91C_BASE_PIOC->PIO_PDR = 1<<13;
    
     	//Configure CS7
     	AT91C_BASE_SMC2->SMC2_CSR[7] = 0x1100318A;
     	*/
     打开:
     	//Net2(extend) init	 (another config CS8900_BASE: 0x40000300)
     	//Reset Net2  **is very important
     	AT91C_BASE_PIOC->PIO_OER = 1<<14;	
     	AT91C_BASE_PIOC->PIO_CODR = 1<<14;		//low
    
     	//Configure CS3
     	AT91C_BASE_SMC2->SMC2_CSR[3] = 0x1100318A;
     	//
    

    保存文件后重新编译: @make

    测试:把u-boot.bin文件下载到开发板中,重新上电串口输出:
    U-Boot 1.3.4 (Jul 25 2020 - 11:49:20)
    DRAM: 32 MB
    Flash: 2 MB
    NAND: 64 MB
    In: serial
    Out: serial
    Err: serial
    CS8900 found?!chip id is 630e
    U-Boot>
    “CS8900 found?!chip id is 630e”,找到cs8900网卡

  10. 配置扩展dm9000
    /u-boot-1.3.4/include/configs/at91rm9200dk.h:
    注释: //#define CONFIG_DRIVER_CS8900 1

    添加在#define CS8900_BUS16		1 /* the Linux driver does accesses as shorts */下面: 
    	/* Ethernet:dm9000 */
    	// #define		CONFIG_DM9000_DEBUG
    	#define CONFIG_DRIVER_DM9000		1
    	#define CONFIG_DM9000_BASE		0x40000000
    	#define DM9000_IO			CONFIG_DM9000_BASE
    	#define DM9000_DATA			(CONFIG_DM9000_BASE + 0x80)
    	#define CONFIG_DM9000_USE_16BIT		1
    	/* Ethernet end */
    

    /u-boot-1.3.4/drivers/net/dm9000x.c:
    添加line411:
    //Configure CS3
    AT91C_BASE_SMC2->SMC2_CSR[3] = 0x10003183;

    保存文件后重新编译: @make clean (注意:一定要先执行make clean, 直接执行make会测试失败)
    @make

    测试: (通过串口打印信息看不出来,只有执行tftp命令时才会调用dm9000)
    U-Boot>tftp 20000000 u-boot.bin
    dm9000 i/o: 0x40000000, id: 0x90000a46
    DM9000: running in 16 bit mode
    MAC: 9e:7f:24:47:25:a1
    operating at 100M full duplex mode
    TFTP from server 10.124.1.174; our IP address is 10.124.0.33
    Filename ‘u-boot.bin’.
    Load address: 0x20000000
    Loading: ########
    done
    Bytes transferred = 115196 (1c1fc hex)
    证明文件传输成功! 网卡测试OK!

  11. 配置 SST39VF6401 MTD分区
    /u-boot-1.3.4/include/configs/at91rm9200dk.h:
    添加: #define CONFIG_CMD_MII下面:
    /* MTD function start */
    #define CONFIG_CMD_JFFS2 //config /fs/jffs2_1pass.c
    #define CONFIG_JFFS2_CMDLINE //config /common/cmd_jffs2.c line133-147
    #define CONFIG_CMD_MTDPARTS
    #define CONFIG_MTD_DEVICE

    	#define NOR_MTD
    	/* NOR FLASH MTD START */ 
    	#ifdef NOR_MTD
    	#define CONFIG_JFFS2_DEV			"nor1"
    	#define MTDIDS_DEFAULT 		"nor1=norflash1"
    	#define MTDPARTS_DEFAULT	"mtdparts=norflash1:3M(kernel)," \
    								"-(root)"
    	/* #define MTDPARTS_DEFAULT	"mtdparts=norflash1:256k@0(u-boot)," \
    								"128k(params)," \
    								"2M(kernel)," \
    								"-(root)"
    	*/ 
    
    	/*CONFIG_EXTRA_ENV_SETTINGS is important! otherwise:error:mtdparts variable not set*/
    	#define CONFIG_EXTRA_ENV_SETTINGS 	\
    			"mtdids="	MTDIDS_DEFAULT		"\0" \
    			"mtdparts="	MTDPARTS_DEFAULT	"\0"
    	#endif /* end NOR_MTD */
    	/* NOR FLASH MTD END */
    
    	/* MTD function end */
    

    保存文件后重新编译: @make

    测试:
    U-Boot>mtdparts
    device nor1 , # parts = 2
    #: name size offset mask_flags
    0: kernel 0x00300000 0x00000000 0
    1: root 0x00500000 0x00300000 0
    active partition: nor1,0 - (kernel) 0x00300000 @ 0x00000000
    defaults:
    mtdids :
    mtdparts:

  12. 配置nand分区
    /u-boot-1.3.4/include/configs/at91rm9200dk.h:
    添加/* NOR FLASH MTD END /下面:
    #define NAND_MTD
    /
    NAND FLASH MTD START */
    #ifdef NAND_MTD
    #define CONFIG_JFFS2_NAND
    #define CONFIG_JFFS2_DEV “nand0”
    #define MTDIDS_DEFAULT “nand0=nandflash0”
    #define MTDPARTS_DEFAULT “mtdparts=nandflash0:3M(kernel),”
    “-(root)”

    	/*CONFIG_EXTRA_ENV_SETTINGS is important! otherwise:error:mtdparts variable not set*/
    	#define CONFIG_EXTRA_ENV_SETTINGS 	\
    			"mtdids="	MTDIDS_DEFAULT		"\0" \
    			"mtdparts="	MTDPARTS_DEFAULT	"\0"
    	#endif /* end NAND_MTD */
    	/* NAND FLASH MTD END */
    

    保存文件后重新编译: @make

    测试:
    U-Boot>mtdparts
    device nand0 , # parts = 2
    #: name size offset mask_flags
    0: kernel 0x00300000 0x00000000 0
    1: root 0x03d00000 0x00300000 0

    	active partition: nand0,0 - (kernel) 0x00300000 @ 0x00000000
    
    	defaults:
    	mtdids  : nand0=nandflash0
    	mtdparts: mtdparts=nandflash0:3M(kernel),-(root)
    
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