http://zone.ni.com/reference/en-XX/help/371599G-01/lvfpgaconcepts/fpga_basic_chip_terms/
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Flip-Flops, LUTs, and Slices
Logic resources are grouped in slices to create configurable logic blocks.
A slice contains a set number of LUTs, flip-flops and multiplexers. （有multiplexers?)
A LUT is a collection of logic gates hard-wired on the FPGA. LUTs store a predefined list of outputs for every combination of inputs and provide a fast way to retrieve the output of a logic operation.
A flip-flop is a circuit capable of two stable states and represents a single bit.
A multiplexer, also known as a mux, is a circuit that selects between two or more inputs and outputs the selected input.
Different FPGA families implement slices and LUTs differently. For example, a slice on a Virtex-II FPGA has two LUTs and two flip-flops but a slice on a Virtex-5 FPGA has four LUTs and four flip-flops. In addition, the number of inputs to a LUT, commonly two to six, depend on the FPGA family.
Registers
A register is a group of flip-flops that stores a bit pattern. A register on the FPGA has a clock, input data, output data, and enable signal port. Every clock cycle, the input data is latched, stored internally, and the output data is updated to match the internally stored data. FPGA VIs use registers to perform the following functions:
- Holding state between iterations of a loop
- I/O synchronization
- Handshaking data between clock domains
- Pipelining
- Communicating with a host VI
FPGA的逻辑资源以Slice 为单元组成。每个Slice含有LUT和flip-flop。LUTs 是查找表，根据输入组合，输出结果；Flip-flop是状态寄存器。记住： 单个reg变量使用的是Flip-flop的资源，如果reg数组编写的是RAM(根据地址读和写)，则在综合的时候使用LUTs或者Bram的资源。
LUTs可以作为distributed ram。 Flip-flop只用来实现register的。